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sames sa2531 a/b/c/e/g/u 1/24 versatile single chip telephone with 14 number repertory dialler sames sa2531 a/b/c/d/e/f/g/j/u speech circuit, ld/mf repertory dialler and tone ringer on one 28 pin cmos chip net 4 compatible soft clip to avoid harsh distortion line loss compensation selectable by pin option power down mode versatile applications for different ptt demands 31 digit last number redial sliding cursor protocol with comparison 2 flash keys, 100 ms and 280 ms (option 600 ms) ring frequency discrimination operating range from 13 to 100 ma (down to 5 ma with reduced perform- ance) volume control of receive signalexcept "d") low noise (max. -72dbmp) real or complex impedance on chip pro- grammable ld/mf switchable dialling 14 memories, 4 direct/10 indirect or 10 direct pause key for 2, 3 or 6 sec auto pause or wait function on chip mf filter (cept cs 203 compat- ible) 3-tone melody generator features m82-2013 pds039-sa2531-001 rev.d 15-05-97 general description the sa2531 is a cmos integrated circuit that contains all the functions needed to form a high performance electronic telephone. the device incorporates ld/mf repertory dialling, melody generation, ring frequency discrimination and a high quality speech circuit. a ram is on chip for a 31 digit last number redial and 14 memories each containing up to 21 digits. the sliding cursor procedure makes last number redial easy behind a pabx. the sa2531 (exept the sa2531d) incorporates a volume control for the earpiece. the receive volume can be controlled by the vol key (+4db) or by the +/- keys (+6db/-4db in 5 steps). the versatility of the circuit is provided by on chip programmability and a few external components. this allows easy adaption to different ptt requirements without changing the pcb of the telephone.
2/24 sa2531 a/b/c/e/g/u sames pin configurations package available in 28 pin dip and plcc pin description pin# symbol function 23 m1 microphone inputs 24 m2 differential inputs for the microphone (electret). 3 ro1 receiver outputs 2 ro2 these are the outputs for driving a dynamic earpiece with an impedance of 150 to 300 ? 5a gnd analogue ground this is the analog ground for the amplifiers. 28 ri receive input this is the input for the receive signal. 6 stb side tone balance input this is the input for side tone cancellation. 1ls line current sense input this is the input for sensing the line current. 27 li line input this input is used for power extraction and line current sensing. 28 pin plcc 28 pin dip
sames sa2531 a/b/c/e/g/u 3/24 pin# symbol function 25 cs current shunt control output this n-channel open drain output controls the external high power shunt transistor for the modulation of the line voltage and for shorting the line during make period of pulse dialling. 4v dd positive voltage supply this is the supply pin for the circuit. 26 v ss negative power supply 8mo melody output pulse density modulated output of the melody generator for tone ringer. at high impedance when not active. 21 fci frequency comparator input this is a schmitt trigger input for ring frequency discrimination. disabled during off-hook. 10 hs/dp hook switch input and dial pulse output this is an i/o that is pulled high by the hook switch when off- hook. an open drain pulls it low during break periods of pulse dialling and flash. 11 osc oscillator input oscillator pin for xtal or ceramic resonator (3.58 mhz). recommended part is the murata csa3.5mg312am. 9 llc line loss compensation select pin for the loss compensation. open = none v dd = 45-75ma v dd = 20-50ma 12 rr repetition rate select pin for repetition rate of melody for the tone rinser. 22 mode signalling mode select input mode pin function high ld mode, 10pps, m:b = 33:66 (j:20pps) open mfonly low ld mode, 10pps, m:b = 40:60 (j:20pps, m:b = 33:66) 20 r1 keyboard rows 19 r2 18 r3 17 r4 16 c1 keyboard columns 15 c2 14 c3 13 c4 7ci complex impedance input input pin for the capacitor in the complex impedance
4/24 sa2531 a/b/c/e/g/u sames functional description power on reset the on chip power on reset circuit monitors the supply voltage (v dd ). when v dd rises above approx. 1.2v, a power on reset occurs to assure correct start-up and the ram is cleared. dc conditions the normal operating range is from 13ma to 100 ma. operating range with reduced performance is from 5ma to 13ma. in the operating range all functions are operational. at line currents below 13ma the sa2531 provided an additional scope below 4.5v to allow parallel operation. (see figure 12). the dc characteristic (excluding diode bridge and pulsing transistors) is determined by the voltage at li and the resistor r1 as follows: vls = vli + i line .r1 the voltage at li is 4.5v. during pulse dialling the speech circuit and other parts of the device not required are in a power down mode to save current. the cs pin is pulled to v ss in order to turn the external shunt transistor on to keep a low voltage drop at the ls pin during make periods. ac impedance the characteristic or output impedance of the sa2531 is set within the ic and adjusted by mask options. available options are for 600 ? and 1000 ? . when the 1000 ? option is selected then a capacitor may be added to the circuit at pin ci to add a reactive element and make the output impedance complex. oscillator all the timing functions of the sa2531 are based on a clock frequency of 3.58mhz. a crystal or ceramic resonator of this frequency should be connected to the osc pin. in practise minor deviations from the nominal frequency may occur due to the characteristics of the frequency reference device used and so it is recommended that care is taken in the selection of components. typically a small value capacitor ( 47pf) should be connected in parallel with the frequency reference to ensure start-up and/or operation at the nominal frequency. speech circuit the speech circuit consists of a transmit and a receive path born with soft clip, mute, line loss compensation and side tone cancellation. transmit the gain of the transmit from m1/m2 to ls is 35db for 600 ? versions and 37db for 1000 ? versions (see test circuit figure 5). the microphone input is differential with an input impedance of 25 k ? . the soft clip circuit limits the output voltage at li to 2.0v peak (see figures 8 & 9). the attack time is 30s/6db and the decay time is 20 ms/6 db. when mute is active, during dialling
sames sa2531 a/b/c/e/g/u 5/24 or after pressing the mute key, the gain is reduced by > 60 db. receive the receive input is the differential signal of ri and stb. the gain of the receive path is 2 db (test circuit figure 5) with differential outputs, ro1/ro2 (0db on 1000 ? versions). when mute is active during dialling the gain is reduced by > 60db. during dtmf dialling a mf comfort tone is applied to the receiver. the comfort tone is the dtmf signal with a level that is -30db relative to the line signal. the receive gain can be adjusted under user control by using the volume control keys (not on sa2531d). the vol key gives a 4db increase or returns the gain to normal in a toggle function. alternatively the + and - keys may be used. the + key increases the gain to a maximum of +6db while the - key reduces the gain to a minimum of -4db. each press of the keys changes the gain by approximately 2db. the gain is reset by the next on-hook. side tone side tone is controlled along with return loss by a double balance bridge as shown in fig. 1. figure 1 double balance bridge (return loss and side tone) with one common ground a good side tone cancellation is achieved by using the following equation: zbal = r5 zline r1
6/24 sa2531 a/b/c/e/g/u sames the side tone cancellation signal is applied to the stb input. line loss compensation when line loss compensation is active the gain of the transmit and receive amplifiers are changed by 6db in accordance with the dc conditions as measured at pins li and ls. when the llc pin is low this adjustment in gain occurs over the range i line = 20 to 50 ma. when llc is high the range is 45 to 75ma. note that these figures apply for r1 = r30 ? . when the llc pin is open the amplifier gains remain fixed regardless of the line current (see figures 6 & 7). dialling functions valid keys the keypad of the sa2531 comprises a maximum of 32 keys some of which are provided to cater for options (such as the two recall/flash periods). a bi-polar scan technique is used so that the 32 keys are scanned in a 4 x 8 matrix using only 8 pins. two explanatory keypad arrangements are illustrated in figures 2 & 3. a valid key is detected when one and only one contact closure is detected between a row and column pin. key contacts are debounced to avoid incorrect detection. it is also possible to drive the keypad inputs with a micro controller. dial mode selection the default mode (ld or mf) can be selected by the mode pin. when default ld mode is selected, a temporary change to mf can be invoked by pressing the * key. the circuit will revert to ld by pressing the r (or r2 ) key or by next on-hook. when mf mode is selected by the mode pin, the circuit can not be changed temporary to ld but will remain in mf. last number redial lnr is a facility that allows resignalling of the last manually dialled number without keying in all the digits again. the lnr is repeatable. the current contents of the ram are overwritten by new entries. a manually entered number is automatically stored in the lnr ram. the capacity of the ram is 31 digits. if a number greater than 31 digits is entered, the lnr facility will be inhibited (until new entries < 32 digits) and further entries will be buffered in a first in first out memory (fifo).
sames sa2531 a/b/c/e/g/u 7/24 post dialled digits, i.e. digits manually entered after lnr has been invoked, are not stored in ram but buffered in fifo. pauses can be inserted by pressing the pause key. (further details of the pause function are included in the memory keys section.) recall function a recall ( r key or r2 key) activation will invoke a flash (timed loop break). if recall is the first entry in a digit string, it will be stored in lnr ram when digit(s) are entered after the recall. if the recall key is depressed after a digit string has been entered or dialled out, the recall will not be stored but buffered in the fifo together with subsequently entered digits. if pressing the recall key is not followed by digit entries, the lnr ram remains intact. after a recall a pause of 27ums or 3 seconds will automatically be executed. on versions c/c/e/g a recall cannot be executed in ld mode. memory keys the keys m1 to m10 are direct memory access keys and the mem key is used for indirect or abbreviated dialling. in the on chip ram, 14 numbers can be stored. each number can contain up to 21 digits (including pauses). during programming multiple pauses can be inserted by pressing the pause key or the lnr key. each pause is 3 seconds (optionally 6 or 2 seconds) when inserted within the first 5 digits otherwise a wait function that will halt dialling until the pause key or the lnr key is depressed. memory dialling is cascadable. however, the content of one memory must be dialled out before a new one can be invoked. mute function the mute key is enabled in speech mode only. depressing the mute key mutes the microphone amplifier. repressing the mute key deactivates the mute (toggle function). any key entry overwrites a mute activated by the mute key and mute will be deactivated. when privacy mute is activated a reminder tone is applied to the earpiece. sliding cursor procedure to accommodate easy and uncomplicated redialling (lnr) behind a pabx, a sliding cursor protocol is implemented. if new entries match the previous ram contents, pressing the lnr key will dial out the remaining digits. if there is an error in matching, the lnr will be inhibited until next on-hook, and the ram will contain the new number.
8/24 sa2531 a/b/c/e/g/u sames tone generator the tone generator incorporates the dtmf tones and 3 basic frequencies for the tone ringer. dtmf tones the dtmf tone generator creates 12 tones in compliance with ccitt recommenda- tion q23. signal levels are altered by mask option. high group frequencies have a level 2.6db higher than those of the low group. details of the dtmf tones are: low group digit 1-2-3 697hz (error = -.074%) digit 4-5-6 770hz (error = -.679% digit 7-8-9 852hz (error = -.621%) digit *-0-# 941hz (error = +.139%) high group digit 1-4-7-* 1209hz (error = +.533%) keybord arrangement 1 10 direct memories (either vol or +/ - keys) figure 2
sames sa2531 a/b/c/e/g/u 9/24 tone ringer the tone ringer of the sa2531 incorporates a discriminator circuit and adjustable melody generator ring frequency discrimination the ring frequency discriminator assures that only signals with a frequency between 20hz and 60hz (option 13 hz to 70 hz) are regarded as valid ring signals. when a valid ring signal is present for 73 ms continuously, the melody generator is activated and remains active as long as the ring signal is present. once the melody generator has been started, the ring signal is continuously monitored and the melody generator is instantly turned on or off according to the momentary presence of a valid or unvalid ring signal respectively (until next por of off-hook). melody generator when a valid ring signal is detected the melody generator is activated and creates a ringing signal comprising 3 frequencies f1 (800hz), f2 (1067hz) and f3 (1333hz). these frequencies are repeated in a sequence of 6 time slots constructed by the frequencies f1 f2 f3 f1 f2 f3 this seqeunce is repeated 1, 4, 7 or 10 times per second as indicated by the connection of the rr pin to one of the four rows of the keyboard. keybord arrangement 2 4 direct and 10 indirect memories (either vol or +/- keys) figure 3
10/24 sa2531 a/b/c/e/g/u sames typical application only the components necessary for presenting the complete functions of the sa2531 are included.
sames sa2531 a/b/c/e/g/u 11/24 digit 2-5-8-0 1336 hz (error = +.176%) digit 3-6-9-# 1477hz (error = -.141%) errors are calculated with reference to a base clock of 3.58mhz and at ambient temperature of 24c. they exclude tolerance errors in the base frequency. operating procedures procedure principles the procedures for utilizing the features of the sa2531 are optimized out of consideration for the human factor in order to: - meet the user?s expectations - be easy to learn and relearn symbols
12/24 sa2531 a/b/c/e/g/u sames privacy mute
sames sa2531 a/b/c/e/g/u 13/24 temporary mf fifo pressing any other key does not change the state. exit fifo
14/24 sa2531 a/b/c/e/g/u sames storing numbers key entries different to the procedure will be ignored. exit programme mode from each state with on-hook or enter. programme state 1) entries (0 - 9, *, #, pause, r, r2) will be stored immediately into the selected memory.
sames sa2531 a/b/c/e/g/u 15/24 automatic dialling postdailled digits are not stored but buffered in fifo
16/24 sa2531 a/b/c/e/g/u sames timing diagrams ld dialling ld dialling with access pause mf dialling
sames sa2531 a/b/c/e/g/u 17/24 flash electrical characteristics absolute maximum ratings positive supply voltage ....................................................................................... -0.3v v dd 7v input current ................................................................................................................. . 25ma input voltage (ls) .............................................................................................. -0.3v v in 10v input voltage (li, cs) ........................................................................................... -0.3v v in 8v input voltage (stb, ri) .............................................................................. -2v v vin v dd +0.3v input voltage (mo) ............................................................................................. -0.3v v in 35v digital input voltage ................................................................................... -0.3v v in v dd +0.3v electrostatic discharge ................................................................................................... 80 0v storage temperature ...................................................................................... -65c to +125c recommended operating conditions supply voltage * (speech mode).......................................................................... 4v v dd 5v oscillator frequency (resonator: murata csa 3.58m g312am).......................... 3.58 mhz operating temperature ................................................................................... -25c to +70c * this voltage is generated internally dc characteristics (i line = 15 ma unless otherwise specified) symbol parameter conditions min typ max units i dd operating current speech mode 3 5 ma mf dialling 4 ma ld dialling v dd = 2.5v 200 a ring mode v dd = 2.5v 300 a i ddo retention current idle mode v dd = 2v, 0.05 a t amb = 25c v li line voltage (default) 13ma i line 100ma 4.5 v i ol output current, sink v ol = 0.4v 1.5 ma cs,hs/dp,mo
18/24 sa2531 a/b/c/e/g/u sames ac characteristics (i line =15ma;f=800hz unless otherwise specified) symbol parameter conditions min typ max units tx transmit test circuit fig.5 a tx gain (m1/m2) z rl =600 ? (/// f / j ) 34 35 36 db z rl = 1000 ? ( c/d/g/v) 36.5 a tx/f variation with frequency f=500hz to 3.4khz 0.8 db thd distortion v li 0.5v rms 2% v agc soft clip level v li =2v peak a sco soft clip overdrive 20 db t attack attack time 30 s/6db t decay decay time 20 ms/6db z in input impedance (m1/m2) 20 k ? a mute mute attenuation mute activated 60 db v no noise output voltage -72 dbmp v fc unwanted frequency 50...300 hz -43 dbm components 4.3...28 khz note 6 above 28 khz -70 dbm v in max input voltage range differential 1 v peak (m1/m2) single ended 0.5 v peak bjt output driver v in max input voltage range (li) 2 v peak v tx dynamic range 2 v peak rl return loss z rl = 600 ? and 1000 ? 18 db
sames sa2531 a/b/c/e/g/u 19/24 ac characteristics (cont?d) (i line = 15 ma;f=800hz unless otherwise specified) symbol parameter conditions min typ max units rx receive test circuit fig.5 a rx receive gain (ro1/ro2) z rl =600 ? (/// f/j ) 12 3db z rl =1000 ? ( c/g/u ) 0 (d) 6 ? a rx/f variation with frequency f=500 hz to 3.4 khz 0.8 db thd distortion v ri 0.5v rms 2% v agc soft clip level v ri =1v peak a sco soft clip overdrive 10 db t attact attact time v ri >0.8v 3 0 s/ 6db t decay decay time 20 ms/6db v no noise output voltage -72 dbmp v fc unwanted frequency 50 hz...20 khz -60 dbm components z in input impedance (ri) 8 k ? v in ri input voltage range(ri) 2 v peak st sidetone test circuit fig.5 a st sidetone cancellation v ri 0.5v rms 26 d b v in st input voltage range (stb) 2 v peak z in input impedance (stb) 80 k ? keyboard t d key debounce time 15 m s hs input t hs-l low to high debounce going off-hook 15 ms t hs-h high to low debounce line breaks/on-hook 240 ms dtmf ? f frequency deviation note 5 1.2 % v mf mf tone level(low group) sa2531b/d/g/u -12.5 -11 -9.5 db sa2531a/c/e/f/j -9.5 - 8 -6.5 db v l-h preemphasis low to high sa2531a/b/c/e/f/j/u 2.0 2 . 6 3.0 db v l-h preemphasis low to high sa2531d/g 2.0 2.6 3.2 db
20/24 sa2531 a/b/c/e/g/u sames ac characteristics cont'd symbol parameter conditions min typ max units t td tone duration note 1 80 82.3 85 ms t itp inter tone pause sa2531a/b/c/d/f/ g/j/u note 1 80 82.3 85 ms t itp inter tone pause sa2531e; note 1 160 165 170 ms t tr tone rise time note 2 5 ms t tf tone fall time note 2 5 ms ld t dr dial rate 5% 10 pps t m/b make/break period 5%, mode=low 40.8/61.2 ms 5%, mode=high 33/66 ms t pdp pre-digit pause 35 ms t idp inter digit pause 800 840 880 ms t mo mute overhang t m t fd flash duration 1 100 102 ms flash duration 2 sa2531b/cd//e/f/g 270 300 ms flash duration 2 sa2531a/j/u 600 650 ms t pfp post flash pause sa2531 a/b/f 2.74 ms sa2531 c/d/e/g/j/u 2.9 3.0 3.1 sec. t ap access pause sa2531a/b/f 2.0 2.05 2.12 sec t ap access pause sa2531c 5.8 6.0 6.2 sec sa2531d/e/g/j/u 2.9 3.0 3.1 sec tone ringer v mo melody output level pdm t md melody delay 10 ms f1 frequency 1 770 800 830 hz f2 frequency 2 1025 1067 1110 hz f3 frequency 3 1280 1333 1385 hz t dt detection time initial 70 80 ms t to detection time-out note 4 ms f min min. detection frequency sa2531d/g 19 20 21 hz f min min. detection frequency sa2531a/b/c/e/f/j/u 12 13 14 hz f max max. detection frequency sa2531d/g 58 59 60 hz max. detection frequency sa2531a/b/c/e/f/j/u 68 70 75 hz
sames sa2531 a/b/c/e/g/u 21/24 sa2531a 600 -6/-8dbm 13-70 82 600 yes 274ms 2 sec sa2531b 600 -9/-11dbm 13-70 82 280 yes 274ms 2 sec sa2531c 1000 -6/-8dbm 13-70 82 280 no 3 sec 6 sec sa2531d 1000 -9/-11dbm 20-60 82 280 no 3 sec 3 sec rx gain + 6db, no vol sa2531e 600 -6/-8dbm 13-70 165 280 no 3 sec 3 sec sa2531f 600 -6/-8dbm 13-70 82 280 yes 274 ms 2 sec mf select (*) with tone SA2531G 1000 -9/-11dbm 20-60 82 280 no 3 sec 3 sec sa2531j 600 -6/-8dbm 13-70 82 600 yes 3 sec 3 sec mode pin: 10/20 pps sa2531u 1000 -9/-11dbm 13-70 82 600 yes 3 sec 3 sec note 1: the values are valid during automatic dialling and are minimum values during manual dialling, i.e. the tones will continue as long as the key is depressed. note 2: the rise time is the time from 10% of final value till the tone amplitude has reached 90% of its final value. note 3: relative to high group. note 4: the fci circuit is reset by por and hs/dp pulled high (off-hook). after a reset the fci circuit is in a standby state. a positive edge on fci will start a 73 ms timer and the frequency discrimination is initiated. whenever a period of the ring signal is missing, the timer is reset. when a valid ring signal is present for 73 ms, the melody generator is started and is directly controlled by the ring signal. this condition will remain until a new reset. note 5: this does not include the frequency deviation of the ceramic resonator. reminder tone v rt level (ro1/ro2) relative to ls -30 dbr t rtd duration 82.3 ms t rti interval 3 sec comfort tone (dtmf) v ct level (ro1/ro2) relative to ls -30 dbr ac characteristics cont'd symbol parameter conditions min typ max units note 6: -37 dbm at 4.3 khz and decreasing 12 db/octave till 28 khz. ordering information: versions zrl dtmf fci itp r2 flash in flash access remarks (w) level (hz) (ms) (ms) ld mode p ause pause package styles: dip "p" soic "s" plcc "f" example: sa2531u in plcc package = sa2531uafa application support: for application support, contact your nearest sames sales office.
22/24 sa2531 a/b/c/e/g/u sames test circuit figure 5
sames sa2531 a/b/c/e/g/u 23/24 notes:
24/24 sa2531 a/b/c/e/g/u sames disclaimer: the information contained in this document is confidential and proprietary to south african micro- electronic systems (pty) ltd ("sames) and may not be copied or disclosed to a third party, in whole or in part, without the express written consent of sames. the information contained herein is current as of the date of publication; however, delivery of this document shall not under any circumstances create any implication that the information contained herein is correct as of any time subsequent to such date. sames does not undertake to inform any recipient of this document of any changes in the information contained herein, and sames expressly reserves the right to make changes in such information, without notification,even if such changes would render information contained herein inaccurate or incomplete. sames makes no representation or warranty that any circuit designed by reference to the information contained herein, will function without errors and as intended by the designer. south african micro-electronic systems (pty) ltd p o box 15888, 33 eland street, lynn east, koedoespoort industrial area, 0039 pretoria, republic of south africa, republic of south africa tel: 012 333-6021 tel: int +27 12 333-6021 fax: 012 333-8071 fax: int +27 12 333-8071

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